🚀 Here goes the final part of "The Optimal Frequency for a PSFB", where our Product Director Jonathan Church explores the benefits and challenges of increasing the operating frequency.
☕ I’m here today to keep my promise and finally round off my previous Newsletter about the effects of frequency change on fixed Transformer designs in a Phase-Shifted Full-Bridge (PSFB). Ready for an in-depth analysis? Grab a big cup of coffee, sit back and enjoy the read!
💭 It’s been a few weeks, so let’s start with a little reminder.
Figure 1. Phase-Shifted Full-Bridge Topology
Table 1. High-Level Specification for PSFB
📈 We saw for our Transformer examples that if we increased the operating frequency, the core losses reduced and the copper losses increased. This had a sort of parabolic effect on the total magnetic losses and showed a distinct minimum.
Figure 2. Fixed Transformer Optimal Operating Frequency
😅 When we changed certain parameters, this minimum moved around and showed us that for a givendesign there is indeed an optimal frequency to operate at. If only that’s where I could have drawn the line and concluded my business…
✨ So, welcome to Part II!
I must have re-written this five times or more. I was looking for an epiphany moment that I could share with you all, shouting out “this is the optimal frequency for a PSFB converter!”, but in truth it is a messy process! To that end I will try my best to keep this revision as “clean” as possible. I’m going to focus on the lessons I've learned throughout the experiment, and I will be very happy if the readers come away having learned something useful themselves.
Let’s get to it. In this article I address the benefits and challenges involved for both the Magnetics in the Converter as I increase my operating frequency. Headlined in the graph below are the total magnetic volumes and losses I achieved over a range of frequencies, for each case I optimized my transformer and output inductor design using Frenetic Online.
Figure 3. Combined Magnetic Volume and Losses Versus Frequency Outcome
From this high-level view you can see that increasing the frequency came with its benefits. I managed to significantly reduce the volume of my Magnetics and reduce the overall losses by about 30%.
🤔 What’s not to like? Should I just keep increasing the frequency? Well, let’s look at each Magnetic in a little more detail before answering that question.
🔎 Output Inductor
Starting with the output Inductor, the first thing to mention is that I am always trying to maintain a 2Apkpk output ripple current as per the specification.
Figure 4. Output Inductor Voltage (Pink) and Current (Blue) Waveform
As I increase the operating frequency of the PSFB I can reduce the inductance.
☝️ TSW is related to the operating frequency of the converter (1/FSW), but note that for this topology the ripple frequency observed by the output inductor is twice the operating frequency, hence why there is a ‘2’ is in the denominator for the equation above. There are some benefits to reducing the inductance value as we go up in frequency, and these can be explained using the formula below.
N = Number of turns
Ac= Effective Cross-Sectional Area of the Core, cm2
Lg = Length of Gap, cm
MPL = Magnetic Path Length, cm
µm = Core Material Permeability
With the ferrite materials I used, “MPL/µm” becomes quite small, considerably more so than the length of the gap. Therefore, we effectively only have three levers we can pull to reduce our inductance value:
Lower the cross-sectional area (smaller core).
Reduce the number of turns (better current density).
Increase the gap length.
📊 During this exercise, I did none of these in isolation, in fact it was some combination of the three that led me to my optimized outcome for each design case. The volume and loss results are shown below, followed by my learnings.
Figure 5. Output Inductor Core Volume & Losses Vs. Frequency
📉 My losses could be reduced significantly – Because I was operating with only 10% as per my specification, there was very little AC ripple content and thus my core losses remained very low. At 2MHz, the core losses were at their greatest but only contributed 6% to the total losses of the inductor.
This won’t always be the case for DC Inductor designs. I chose a 10% ripple which is very conservative, and I paid the price by having a larger inductance value than I could have otherwise gotten away with. With a greater ripple content, the effects on both core losses and winding losses (from the fringing field of the gap, and proximity/skin effects) can become very significant at high frequencies. My graph above would no doubt look quite different with different ripple factors.
💡The AC losses in the copper remained equally small, therefore the main loss mechanism here was DC resistance of the conductor (I2R). Because I was able to both reduce the number of turns and core size with an increasing frequency, the DC resistance of the wire could reduce, thus, my losses.
Less turns = more space, therefore thicker conductors, therefore lower resistance
Smaller core = shorter distance to make one turn, therefore lower resistance
📉 I could reduce the volume significantly – This is true enough, but there are some practical limits to be mindful of if I were to keep moving in this direction:
Eventually, if the core becomes small enough or there are too few turns, the core will reach saturation.
If, for the reason above, the turns can’t be reduced, then the current density in the windings will increase with smaller cores. Afterall, the same current is still being pushed through it, so this will begin to make cooling significantly more difficult.
The gap size may become impractical in relation to the core size as I begin to rely on this more as a tool to manage the inductance value needed.
The AC losses, as they eventually do, will become too significant at higher frequencies.
Parasitic capacitances may become trickier to handle, having wider implications on the other converter elements.
The inductor isn’t the only thing in the system, so ultimately, I’m going to need to compare the benefits that the inductor is receiving against the effects that frequency increase has on other components in the converter!
🔎 Transformer
Importantly for the transformer design, I wanted to ensure that the Converter would operate in peak current control mode, which is popular for this topology.
Figure 6. PSFB Transformer Voltage (Pink) and Current (Blue)
🖩 I used the formula below provided by a Texas Instruments App Note to calculate my required minimum transformer magnetizing inductance.
DTYP = Duty Cycle.
N = Turns Ratio.
ΔILOUT = Magnitude of Output Inductor Ripple Current (2 Apkpk).
The formula used to define the duty cycle and turns ratio is as below (I’ve taken this from my favorite “poster” that I frequently visit to jog the memory).
⚙️ You can see how for this topology it is important to minimize the leakage inductance (don’t forget you need enough to facilitate ZVS though). For us, it is going to be so much smaller than the magnetizing inductance that we can ignore it for this exercise. For simplicity, if we also assume that the diode forward voltages (Vf) are much less than the output voltage, we get a more straight-forward equation.
I fixed the duty cycle at 0.8 and the Ns/Np to 0.15, in reality I didn’t get this exactly, and it’s arbitrary but it’s a good place to start.
🔑 Hopefully now I have provided you with enough information to show that as the frequency increases, my required magnetizing inductance decreases. See below the evolution of my transformer designs across the range of frequencies, and some further learnings.
Figure 7. PSFB TRANSFORMER Volume & Losses Vs. Frequency
💁 If I want to truly optimize, I must be willing to explore different profiles and shapes, or even customize my own core dimensions – Sticking with one core family (E Cores), as I did for the simplicity of this article, made it quite difficult to get an optimal design. The discreteness of the variables, namely turns and core dimensions, means that often the stars do not align, and one can be pushed to run with higher current densities or flux densities than desired. It’s the main reason why the graphs I have presented for both Magnetics above have bumps and notches in them.
🧐I must understand my materials - The next problem I encountered was my reducing lack of ability to achieve the minimum magnetizing inductance I required. I made clear that I wanted to obtain a minimal magnetizing inductance, but this became harder, both as my core sizes reduced, and as I had to change my materials.
Because I didn’t change the core family (and I make a point of saying this because I haven’t done the analysis for what I’m about to say with other core shapes), as the core sizes reduced, the cross-sectional area reduced at a faster rate than the MPL. This lessened the benefits I thought I was going to get by reducing my magnetizing inductance, hence my turns count wasn’t reflected in the reduction. This meant that it became harder to maintain a manageable current density (and temperature rise).
⚡ The same problem came back when I changed materials. It made sense for me as I increased the operating frequency to move from 3C95 through 3F36 to 3F46 to keep the core losses down. But the permeability of the materials reduced, meaning that I had to work even harder to maintain a minimum magnetizing inductance.
This is the main reason why you can see such a sharp plateau of transformer volume in the graph.
🤓 It certainly helps to understand the full picture – Finally, because there is high AC content in the waveform of the Transformer, unlike the output inductor, the AC losses are not negligible. You may notice in Figure 6 that the total losses are beginning to increase again, and this is owed to the AC resistance of the windings increasing. If I can briefly put in your mind the notions discussed in my previous Newsletter, for this experiment, with my 500 kHz design, the losses were well-balanced (44.6% Core | 55.4% Copper) meaning that I was close to the optimal efficiency of that design.
When I moved to 1MHz I ended up with the same core however, and pretty much the same number of turns for reasons I hope you will now appreciate. This meant that from the previous design, the core losses reduced, and the copper losses increased moving us further away from the optimal point (17.9% Core | 82.1% Copper). And it only goes in one direction from here.
But that doesn’t necessarily mean I have to stop increasing the frequency…
✅ Conclusion
This all comes down to context now. I hope, if you are currently designing a PSFB that this has helped, but the extent to which my different observations affect you will vary depending on your own Converter specifications.
I observed that although moving from 500 kHz to 1 MHz didn’t give me any further volume reduction in the transformer, it also didn’t give me greatly more power losses (7.5% Increase). So perhaps I’ll be happy operating it away from its optimal frequency at 1 MHz if it means I get benefits elsewhere in the design that can justify it.
Afterall, the Inductor continued to reduce in losses and volume, and the output capacitance can reduce, further impacting my converter volume. I would finally have to trade off against the increased switching losses in my semiconductors. But with any luck I’m achieving ZVS, and this will make my job substantially easier!
🧑💻 The experts here at Frenetic have created powerful models, and these gave me the ability to rapidly explore my design options and understand the limitations. If you want to start making better designs, get in touch with us! And don’t forget we also have a lab with a large range of stock where we can build rapid, high-quality samples for you. We understand how important it is to get a working prototype for your converter as soon as possible so you can begin testing!
😎 I hope you've enjoyed it! See you in the next one.
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Texas Instruments. (2023). Texas Instruments Power Topologies. Retrieved from Texas Instruments Power Topologies: ti.com/lit/ml/sluw001g/sluw001g.pdf?ts=1686054985112&ref_url=https%253A%252F%252Fwww.google.com%252F
